Substrates with electronically active components distributed over the extent of the substrate may be used in a variety of electronic systems, for example, flat-panel imaging devices such as flat-panel liquid crystal or organic light emitting diode (OLED) display devices and in flat-panel solar cells. A variety of methods may be used to distribute electronically active circuits over substrates, including forming the electronically active circuits on a substrate and forming the components on separate substrates and placing them on a substrate. In the latter case, a variety of assembly technologies for device packaging may be used.
Electronically active components are typically formed on a substrate by sputtering a layer of inorganic semiconductor material or by spin-coating organic material over the entire substrate. Inorganic semiconductor materials can be processed to improve their electronic characteristics, for example amorphous silicon can be treated to form low-temperature or high-temperature poly-crystalline silicon. In other process methods, microcrystalline semiconductor layers can be formed by using an underlying seeding layer. These methods typically improve the electron mobility of the semiconductor layer. The substrate and layer of semiconductor material can be photo-lithographically processed to define electronically active components, such as transistors. Such transistors are known as thin-film transistors (TFTs) since they are formed in a thin layer of semiconductor material, typically silicon. Transistors may also be formed in thin layers of organic materials. In these devices, the substrate is often made of glass, for example Corning Eagle® or Jade® glass designed for display applications.
The above techniques have some limitations. Despite processing methods used to improve the performance of thin-film transistors, such transistors may provide performance that is lower than the performance of other integrated circuits formed in mono-crystalline semiconductor material. Semiconductor material and active components can be provided only on portions of the substrate, leading to wasted material and processing costs. The choice of substrate materials can also be limited by the processing steps necessary to process the semiconductor material and the photo-lithographic steps used to pattern the active components. For example, plastic substrates have a limited chemical and heat tolerance and do not readily survive photo-lithographic processing. Furthermore, the manufacturing equipment used to process large substrates with thin-film circuitry is relatively expensive. Other substrate materials that may be used include quartz, for example, for integrated circuits using silicon-on-insulator structures as described in U.S. Patent Application No. 2010/0289115 and U.S. Patent Application No. 2010/0123134. However, such substrate materials can be more expensive or difficult to process.
Other methods used for distributing electronically functional components over a substrate in the circuit board assembly industry include pick-and-place technologies for integrated circuits provided in a variety of packages, for example, pin-grid arrays, ball-grid arrays, and flip-chips. However, these techniques may be limited in the size of the integrated circuits that can be placed.
In other manufacturing techniques, a mono-crystalline semiconductor wafer is employed as the substrate. While this approach can provide substrates with the same performance as integrated circuits, the size of such substrates may be limited, for example, to a 12-inch diameter circle, and the wafers are relatively expensive compared to other substrate materials such as glass, polymer, or quartz.
In yet another approach, thin layers of semiconductor are bonded to a substrate and then processed. Such a method is known as semiconductor-on-glass or silicon-on-glass (SOG) and is described, for example, in U.S. Pat. No. 7,605,053, issued Oct. 20, 2009. If the semiconductor material is crystalline, high-performance thin-film circuits can be obtained. However, the bonding technique and the processing equipment for the substrates to form the thin-film active components on large substrates can be relatively expensive.
Publication No. 11-142878 of the patent Abstracts of Japan entitled Formation of Display Transistor Array Panel describes etching a substrate to remove it from a thin-film transistor array on which the TFT array was formed. TFT circuits formed on a first substrate can be transferred to a second substrate by adhering the first substrate and the TFTs to the surface of the second substrate and then etching away the first substrate, leaving the TFTs bonded to the second substrate. This method may require etching a significant quantity of material, and may risk damaging the exposed TFT array.
Other methods for locating material on a substrate are described in U.S. Pat. No. 7,127,810. In this approach, a first substrate carries a thin-film object to be transferred to a second substrate. An adhesive is applied to the object to be transferred or to the second substrate in the desired location of the object. The substrates are aligned and brought into contact. A laser beam irradiates the object to abrade the transferring thin film so that the transferring thin film adheres to the second substrate. The first and second substrates are separated, peeling the film in the abraded areas from the first substrate and transferring it to the second substrate. In one embodiment, a plurality of objects is selectively transferred by employing a plurality of laser beams to abrade selected area. Objects to be transferred can include thin-film circuits.
U.S. Pat. No. 6,969,624 describes a method of transferring a device from a first substrate onto a holding substrate by selectively irradiating an interface with an energy beam. The interface is located between a device for transfer and the first substrate and includes a material that generates ablation upon irradiation, thereby releasing the device from the substrate. For example, a light-emitting device (LED) is made of a nitride semiconductor on a sapphire substrate. The energy beam is directed to the interface between the sapphire substrate and the nitride semiconductor releasing the LED and allowing the LED to adhere to a holding substrate coated with an adhesive. The adhesive is then cured. These methods, however, may require the patterned deposition of adhesive on the object(s) or on the second substrate. Moreover, the laser beam that irradiates the object may need to be shaped to match the shape of the object, and the laser abrasion can damage the object to be transferred. Furthermore, the adhesive cure takes time, which may reduce the throughput of the manufacturing system.
Micro-transfer-printing is an advanced assembly technology for applications that benefit from heterogeneous integration of high-performance micro-scale devices. Micro-device systems compatible with micro-transfer-printing include silicon integrated circuits, solar cells, light emitting diodes, compound semiconductor transistors, and lasers.
In micro-transfer-printing, engineered viscoelastic elastomer stamps are used to pick up and transfer arrays of components from the native substrate on or in which the components are formed onto non-native destination substrates. The components are fabricated using mature materials and processes, and are made print-compatible using micromachining or etching processes which leave the micro-components undercut. The undercut components remain fixed to the native wafer through tethering structures connected to non-undercut anchors. Conventional photolithographic methods are then used to form thin-film metal traces which interconnect the printed device arrays.
Such a micro-transfer printing method for transferring active components from one substrate to another is described in AMOLED Displays using Transfer-Printed Integrated Circuits published in the Proceedings of the 2009 Society for Information Display International Symposium Jun. 2-5, 2009, in San Antonio Tex., US, vol. 40, Book 2, ISSN 0009-0966X, paper 63.2 p. 947. In this approach, small integrated circuits are formed over a buried oxide layer on the process side of a crystalline wafer. The small integrated circuits, or chiplets, are released from the wafer by etching the buried oxide layer formed beneath the circuits. A PDMS stamp is pressed against the wafer and the process side of the chiplets is adhered to the stamp. The chiplets are pressed against a destination substrate or backplane coated with an adhesive and thereby adhered to the destination substrate. The adhesive is subsequently cured. In another example, U.S. Pat. No. 8,722,458 entitled Optical Systems Fabricated by Printing-Based Assembly teaches transferring light-emitting, light-sensing, or light-collecting semiconductor elements from a wafer substrate to a destination substrate or backplane.
In such system it is necessary to electrically connect the small integrated circuits or chiplets to electrically conductive elements such as backplane contact pads on the destination substrate. By applying electrical signals to conductors on the destination substrate the small integrated circuits are energized and made operational. The electrical connections between the small integrated circuits and the backplane contact pads are typically made by photolithographic processes in which a metal is evaporated or sputtered onto the small integrated circuits and the destination substrate to form a metal layer, the metal layer is coated with a photoresist that is exposed to a circuit connection pattern, and the metal layer and photoresist are developed by etching and washing to form the patterned electrical connections between the small integrated circuits and the connection pads on the destination substrate. Additional layers, such as interlayer dielectric insulators can also be required. This process is expensive and requires a number of manufacturing steps. Moreover, the topographical structure of the small integrated circuits over the destination substrate renders the electrical connections problematic. For example, it can be difficult to form a continuous conductor from the destination substrate to the small integrated circuit because of the differences in height over the surface between the small integrated circuits and the destination substrate.
There is a need, therefore, for structures and methods that enable the electrical interconnection of small integrated circuits, such as micro-transfer printed chiplets, to destination substrates.